Thin-film transistors (TFTs) are commonly used in most semiconductor electronic apparatus as switches in active matrix liquid crystal displays, image sensors or the like. However, applications of TFT devices have limitations. For example, in the process of manufacturing liquid crystal displays, when glass or quartz substrates are delivered or processed on the production line, TFT devices generally accumulate a large number of charges and introduce electrostatic discharge (ESD) damage because of their random grains and large resistance. It is therefore very important to provide ESD protection circuits around the input and output (I/O) pads to increase the production yield.
However, as shown in FIG. 1A, when a positive discharge voltage is applied to the output pad (Drain) with the Vss pad (Source) relatively grounded, the ESD protection device 10, such as a reverse diode at the drain, is stressed by the ESD voltage and breaks down, which results in the clamp of the overstress voltage on the pad. Furthermore, when the heat induced by the ESD is larger than that the ESD protection device can sustain, the ESD protection device will be damaged. There is therefore more and more research investigating behavior of TFT devices during ESD, most of which focuses on the resultant damage and the damage mechanisms. For example, in order to sustain larger ESD currents, increasing the area of device is proposed to promote the breakdown voltage. However, as shown in FIG. 1B, when the channel length reaches a certain value, such as 10 μm, the breakdown voltage stays constant with an approximate value of 430V.
Therefore, there is a need to provide an ESD protection device with increased robustness to sustain higher ESD currents and prevent the electronic apparatus from damage.